Solutions Architect

Looking for innovative, out of the box thinking Test Solution Architects to be a part of the Methodology & Product Engineering team under the Test BU at Synopsys. Synopsys technology is at the heart of innovations that are changing the way we live and work. The Methodology & Product Engineering team is a critical part of the change developing new groundbreaking technology while delivering a complete DFT solution to the customer needs.

The Design-for-Test Solution's Architect is responsible for developing the next gen technology in Test and productize the technology. The position would involve research into new and upcoming technologies, analyze gathered data, identify the viability of the technology and present the findings. The Solution's Architect oversees IP architecture definition, design and verification including schedule/resource management.

Responsibilities include but not limited to the following:

• Drive & Develop new Design for Test methodologies.
• Identify emerging technologies and design requirements to focus the methodology development in that direction.
• Authoring detailed Product Requirement specs and microarchitecture specs
• Develops white-papers on methodology and other documentation as may be required for projects.
• Conceptualize and architect complex DFT flows and methodologies across varying industry segments like Autonomous Transportation, Mission critical AI, High performance computing and Mobile networking.
• Diagnostics analysis and debug.
• Provides methodologies for test automation flow integration with design planning, RTL analysis, logic synthesis, physical design and sign-off verification tools (static timing, simulation, formal verification).
• Review customer designs and flows to identify drawbacks and provide solutions to fix them
• Provide technical leadership and Mentor other people in the team.
• Drive the deployment of new technologies with customers.
• Manage and report status of technology/feature development for product

Qualification

• 12+ years of expertise in the field of Design for Test.
• Expert in the Scan, Memory BIST, JTAG, I1500, I1687, LBIST, Automotive Testing, low power design and various other test methodologies
• Experience with RTL Coding, Scan/Mbist insertion, Validation, Pattern generation & Silicon Bringup
• Excellent communication and presentations skills are mandatory. Listening, understanding, and interpreting the customer requirements are a key part of the communications skill set.
• Good technical problem solving skills are a must.
• Experience in architecting complex DFT flows and methodologies and helping designers deploy these flows on complex SoC is a plus.

The base salary range across the U.S. for this role is between $166,000-$250,000 annually. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.