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Mixed Signal Verification Engineer
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Ampcus Inc. is a certified global provider of a broad range of Technology and Business consulting services. We are in search of a highly motivated candidate to join our talented Team.
Job Role: Mixed Signal Verification Engineer;
Work Location: Sunnyvale, California (Onsite Position)
Duration: 6+ Months
Background check: Mandatory
Meet and great: Mandatory
JOB DESCRIPTION:
Mixed signal Design Verification requirements:
1. Fluent in system verilog real number modeling
2. Familiarity with writing regression tests for analog behavioral model verification
3. Familiarity with generating randomized vectors for analog behavioral model verification
4. Familiar with developing checker & writing assertions.
5. Good communication skills
6. Good debug skills
7. Experienced with gate level parasitic annotated simulations.
8. Available to work during the US work hours.
9. Hands on experience with UVM
System Verilog real number modeling
Writing regression tests for analog behavioral model verification
Generating randomized vectors for analog behavioral model verification
Developing checker & writing assertions.
1. Fluent in system verilog real number modeling
2. Familiarity with writing regression tests for analog behavioral model verification
9. Hands on experience with UVM
3. Familiarity with generating randomized vectors for analog behavioral model verification
4. Familiar with developing checker & writing assertions.
5. Good communication skills
6. Good debug skills
7. Experienced with gate level parasitic annotated simulations.
This is running mixed signal - DMS simulations and developing system verilog and EEnet based analog models
Ampcus is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identify, national origin, age, protected veterans or individuals with disabilities.
Job Role: Mixed Signal Verification Engineer;
Work Location: Sunnyvale, California (Onsite Position)
Duration: 6+ Months
Background check: Mandatory
Meet and great: Mandatory
JOB DESCRIPTION:
Mixed signal Design Verification requirements:
1. Fluent in system verilog real number modeling
2. Familiarity with writing regression tests for analog behavioral model verification
3. Familiarity with generating randomized vectors for analog behavioral model verification
4. Familiar with developing checker & writing assertions.
5. Good communication skills
6. Good debug skills
7. Experienced with gate level parasitic annotated simulations.
8. Available to work during the US work hours.
9. Hands on experience with UVM
System Verilog real number modeling
Writing regression tests for analog behavioral model verification
Generating randomized vectors for analog behavioral model verification
Developing checker & writing assertions.
1. Fluent in system verilog real number modeling
2. Familiarity with writing regression tests for analog behavioral model verification
9. Hands on experience with UVM
3. Familiarity with generating randomized vectors for analog behavioral model verification
4. Familiar with developing checker & writing assertions.
5. Good communication skills
6. Good debug skills
7. Experienced with gate level parasitic annotated simulations.
This is running mixed signal - DMS simulations and developing system verilog and EEnet based analog models
Ampcus is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identify, national origin, age, protected veterans or individuals with disabilities.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
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