ASIC Design Engineer
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Job Description:
The ASIC Design Engineer will need to interact internally with the Design Architect and externally with customers on aspects including but not limited to physical synthesis, influencing RTL content and coding styles that will lend itself to seamless closure in the physical design backend flows. The individual will also be responsible for defining/ co-defining timing constraints with the customer and interface with the physical design team to aid in overall closure and manufacture of the ASIC with emphasis on low power, optimized area, max. performance and high overall manufacturing yield.
The candidate should have a strong understanding of VLSI and ASIC physical design
20+ years of experience w/ a deep understanding of ASIC architecture, design, development and verification.
- Significant experience with synthesis and physical synthesis tools (Synopsys and Cadence tool suites preferred)
- Deep understanding of PLLs and clock networks
- Significant experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.
- Ability to create and debug timing constraints
- Ability to understand and debug warning and error messages from the timing tool
- Ability to generate and understand timing reports
Deep understanding of STA concepts
- Solid understanding of RC networks and how they affect the timing/propagation of signals
- Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
- Understanding of setup analysis, hold analysis, and other timing checks
- Ability to understand and create timing diagrams
Deep understanding of more advanced STA concepts
- POCV/SOCV/LVF modeling of variation
- MIS - multi input switching
- CCS/ECSM/NLDM - liberty timing models
- PBA - path based analysis
- LOCV/SOCV - location aware timing derates
Experience using SPICE analysis
Coding experience
- TCL is required. Experience with at least one or two other coding languages is preferred
Communication and organizational skills
- Must have the ability to work and clearly communicate with the customer, multiple engineers and teams across geographies
- Must have the ability to work with and organize large amounts of data
- Must be able to organize and present data in a clear manner
- Must be able to manage a large variety of tasks
Strong ability to debug problems and create solutions
- Strong engineering capabilities and good engineering judgement.
Job Complexity:
Works on significant and unique development and support issues where analysis of situations or data requires an evaluation of intangibles along with an in-depth understanding of the underlying design/ constraints and implementation techniques used. Exercises independent judgment in methods, techniques and evaluation criteria for obtaining results. Creates formal networks involving coordination among groups and works well with individuals and teams spread across geographical time-zones.
Supervision:
Acts independently to determine methods and procedures on new or special assignments. Will supervise the activities of others. Works in close collaboration with his/her supervisor and can effectively context-switch and multi-task based on business need.
Education and Experience required:
Programming Languages : Python/Ruby, TCL, BASH
General: Professional, open, and highly self-motivated attitude
Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $141,000 - $225,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)
2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description:
The ASIC Design Engineer will need to interact internally with the Design Architect and externally with customers on aspects including but not limited to physical synthesis, influencing RTL content and coding styles that will lend itself to seamless closure in the physical design backend flows. The individual will also be responsible for defining/ co-defining timing constraints with the customer and interface with the physical design team to aid in overall closure and manufacture of the ASIC with emphasis on low power, optimized area, max. performance and high overall manufacturing yield.
The candidate should have a strong understanding of VLSI and ASIC physical design
20+ years of experience w/ a deep understanding of ASIC architecture, design, development and verification.
- Significant experience with synthesis and physical synthesis tools (Synopsys and Cadence tool suites preferred)
- Deep understanding of PLLs and clock networks
- Significant experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.
- Ability to create and debug timing constraints
- Ability to understand and debug warning and error messages from the timing tool
- Ability to generate and understand timing reports
Deep understanding of STA concepts
- Solid understanding of RC networks and how they affect the timing/propagation of signals
- Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
- Understanding of setup analysis, hold analysis, and other timing checks
- Ability to understand and create timing diagrams
Deep understanding of more advanced STA concepts
- POCV/SOCV/LVF modeling of variation
- MIS - multi input switching
- CCS/ECSM/NLDM - liberty timing models
- PBA - path based analysis
- LOCV/SOCV - location aware timing derates
Experience using SPICE analysis
Coding experience
- TCL is required. Experience with at least one or two other coding languages is preferred
Communication and organizational skills
- Must have the ability to work and clearly communicate with the customer, multiple engineers and teams across geographies
- Must have the ability to work with and organize large amounts of data
- Must be able to organize and present data in a clear manner
- Must be able to manage a large variety of tasks
Strong ability to debug problems and create solutions
- Strong engineering capabilities and good engineering judgement.
Job Complexity:
Works on significant and unique development and support issues where analysis of situations or data requires an evaluation of intangibles along with an in-depth understanding of the underlying design/ constraints and implementation techniques used. Exercises independent judgment in methods, techniques and evaluation criteria for obtaining results. Creates formal networks involving coordination among groups and works well with individuals and teams spread across geographical time-zones.
Supervision:
Acts independently to determine methods and procedures on new or special assignments. Will supervise the activities of others. Works in close collaboration with his/her supervisor and can effectively context-switch and multi-task based on business need.
Education and Experience required:
- MS degree in Electrical Engineering or Computer Engineering and 20+ years related experience
Programming Languages : Python/Ruby, TCL, BASH
General: Professional, open, and highly self-motivated attitude
Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $141,000 - $225,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
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