Digital Design Engineer (FPGA/ASIC)

Job Title: FPGA/ASIC Design Specialist

Location: Indianapolis, IN (Hybrid working) or Chicago, IL (Hybrid working)

Shift: General

Salary range: $113,179 - $183,916/yr Annually depending upon experience

Employment type: Full-time/Permanent

Job Description

FPGA/ASIC Design Specialist

Indianapolis, IN (Hybrid working)

Relocation assistance will be provided if applicable.

Client is looking for a FPGA/ASIC (Field Programmable Gate Arrays / Application Specific Integrated Circuit) Design Specialist to join our growing team. This is an exciting opportunity to work on flagship Client programs and play a vital role in solving some of the most complex and interesting technological challenges in the industry while being part of a global, multi-disciplinary team. In this role, you will travel up to 25% between Client sites in Indianapolis and West Lafayette, IN as needed for work.

In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which will be integrated in current and future Client engine control system products. You will be responsible for developing FPGA/ASIC architectures, coding, running simulations, synthesis, creating test benches, and preparing documentation to be reviewed by certification authorities.

Dream Big and Make an Impact

At Client, we pioneer cutting-edge technologies that deliver the cleanest, safest and most competitive solutions to our planet s vital power needs. We embrace the power of data and technology and aim to be Digital First in everything we do.

To ensure we remain at the forefront of our industry, Client has a team of over 17,000 engineers around the globe. They include everyone from world experts in their field to those who manage hundreds of people and millions of dollars worth of investments. We recruit engineers at all levels and in a range of disciplines. And while we encourage specialization, we also offer options to cross-specialize and develop skills across several different areas.

The client is a Military Friendly Employer. We evaluate qualified applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic. You can learn more here.

Key Accountabilities:

Participate in all phases of project, to produce detailed design documentation, verification plans and reports

The design and development of all custom digital devices (ASIC or FPGA), to support RR electronic engine control units

The verification of complex products that use FPGAs and/or ASICs to DO-254

Develop RTL utilizing a hardware description language (e.g. VHDL, Verilog, and/or System Verilog) and debug the design via simulation tools

Expertise achieving timing closure on FPGA designs and generating test benches

Evaluate the process flow including but not limited to high level design, synthesis, place and route, timing constraints and power utilization

Basic Requirements:

Bachelor's degree in Electronics Engineering and/or Computer Engineering with 5+ years of experience, OR

Master's degree in Electronics Engineering and/or Computer Engineering with 3+ years of experience, OR

PhD in Electronics Engineering and/or Computer Engineering

In order to be considered for this role, you must be a U.S. Citizen

Preferred Requirements:

Validate the FPGA hardware in the lab using test equipment (oscilloscopes, logic analyzers) and debug tools (e.g ILA, JTAG)

Experience in scripting with languages such as TCL, Python, Shell scripts

• Seniority Level

  Mid-Senior level

• Industry

  • Engineering Services
  • Aviation and Aerospace Component Manufacturing
  • Computers and Electronics Manufacturing

• Employment Type

  Full-time

• Job Functions

  • Engineering
  • Research
  • Design

• Skills

  • Shell Scripting
  • Timing Closure
  • Computer Simulations
  • Detailed Design
  • TCL
  • Application-Specific Integrated Circuits (ASIC)
  • Electronic Engineering
  • Joint Test Action Group (JTAG)
  • Design Documents
  • Python (Programming Language)
  • Field-Programmable Gate Arrays (