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Jobs or company...

Design Verification Engineer

Salary undisclosed
Checking job availability...
Original
Simplified

Role: Design Verification Engineer
Location: Bay Area, CA Hybrid

Job Description:

Key Responsibilities:

* Develop and implement verification plans for complex SoC designs, with a focus on HighSpeed protocols.

* Create and maintain advanced testbenches using SystemVerilog and UVM (Universal

Verification Methodology).

* Write and execute test cases to verify functional and performance requirements in Highspeed protocols.

* Debug and resolve functional and performance issues in collaboration with design and architecture teams.

* Develop and enhance verification

environments, including reusable components and checkers for Highspeed protocols

* Perform coverage-driven verification and ensure coverage closure.

* Collaborate with cross-functional teams to define verification strategies and methodologies.

* Mentor junior engineers and contribute to the continuous improvement of verification processes.

Qualifications:

* 7+ years of hands-on experience in SoC design verification, with a strong focus on Highspeed protocols.

* Expertise in SystemVerilog and UVM

(Universal Verification Methodology).

* In-depth knowledge of Highspeed protocols specifications and verification methodologies.

* Proficiency in developing and debugging complex testbenches and test cases for Highspeed protocols.

* Experience with coverage-driven verification and achieving coverage closure.

* Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces.

* Knowledge of low-power verification techniques and power-aware simulation.

* Experience with formal verification tools and methodologies is a plus.

* Strong problem-solving skills and attention to detail.

* Excellent communication and teamwork skills.
Thanks & Regards,

SR IT Recruiter
Aravind Kumar
Email:
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
Report this job

Role: Design Verification Engineer
Location: Bay Area, CA Hybrid

Job Description:

Key Responsibilities:

* Develop and implement verification plans for complex SoC designs, with a focus on HighSpeed protocols.

* Create and maintain advanced testbenches using SystemVerilog and UVM (Universal

Verification Methodology).

* Write and execute test cases to verify functional and performance requirements in Highspeed protocols.

* Debug and resolve functional and performance issues in collaboration with design and architecture teams.

* Develop and enhance verification

environments, including reusable components and checkers for Highspeed protocols

* Perform coverage-driven verification and ensure coverage closure.

* Collaborate with cross-functional teams to define verification strategies and methodologies.

* Mentor junior engineers and contribute to the continuous improvement of verification processes.

Qualifications:

* 7+ years of hands-on experience in SoC design verification, with a strong focus on Highspeed protocols.

* Expertise in SystemVerilog and UVM

(Universal Verification Methodology).

* In-depth knowledge of Highspeed protocols specifications and verification methodologies.

* Proficiency in developing and debugging complex testbenches and test cases for Highspeed protocols.

* Experience with coverage-driven verification and achieving coverage closure.

* Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces.

* Knowledge of low-power verification techniques and power-aware simulation.

* Experience with formal verification tools and methodologies is a plus.

* Strong problem-solving skills and attention to detail.

* Excellent communication and teamwork skills.
Thanks & Regards,

SR IT Recruiter
Aravind Kumar
Email:
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
Report this job