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Position for Senior Principal CAD, EDA Analog Mixed-Signal Design Engineer or Design Engineer - RF/SiPho/TIA/CMOS Location : Ottawa, ON Canada ( Hybrid Work )

Salary undisclosed

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Hi ,

Synergy Technologies is a leader in technology services and consulting. We enable clients across the world to create and execute strategies .We help our clients find the right problems to solve, and to solve these effectively. We bring our expertise and innovation to every project we undertake

Position: Senior Principal Design Engineer or Signal Design Engineer or IC Design Engineer CAD,EDA Analog Mixed-Signal Design Engineer - RF/SiPho/TIA/CMOS

Duration : Contract

Location : Ottawa, ON Canada

( Hybrid Work )

Senior Principal Analog Mixed-Signal Design Engineer - RF/SiPho/TIA/CMOS/SiGe

Internal Circuit Design Engineer, Signal Design Engineer

Hybrid

In office 2 days a week minimum

Job description

Group designs physical layer ICs for high-speed fiber optic data communication, such as Transimpedance Amplifiers (TIAs), and drivers for Silicon Photonic (SiPho) and discrete Electro-absorption Modulators (EAMs) and Mach-Zehnder Interferometer Modulators (MZMs). This group is the market leader in delivering TIAs and Drivers for Data Center and Telecom markets. We address the bandwidth, capacity and power issues faced by cloud computing and mega data center networks. Our world class group leverages our core competencies in advanced circuit design to solve the world s ever-increasing desire to transmit more data for less power with fewer errors. We are continually first to market in Data Center, Metro and Long-Haul applications.

As a member of the design group, the candidate will be responsible for design and validation of FET and BiCMOS circuits for high-speed broadband ICs that serve these application

What You Can Expect

Job Responsibilities

They are seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz Transimpedance amplifiers TIAs. These optical interface chips are tightly coupled with our high-performance equalizers. The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems.

In this role you will be responsible for:

  • Active circuit design as well as technical leadership.
  • Design leading edge transimpedance amplifier design, primarily in Silicon Germanium (SiGe) BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) technology, where circuit performance will need to transcend beyond industry leading products.
  • Develop transmission line structures and other millimeter wave structures to enable higher performance than would normally be achievable.
  • Design of high-performance broadband analog circuits for optical front-end receivers.
  • Design of various other analog circuits including linear regulators, Aloop, current/voltage sensors, band gaps etc.
  • Develop microarchitecture of chips and major circuit blocks and guide a team of designers to implement them. Work with various technologies including SiGe BiCMOS and CMOS.
  • Work with other functional groups to drive post-silicon validation, qualification, transition to mass production, and customer support.
  • Work with management and marketing to define parts and translate the specifications and definitions into circuit implementation

What We're Looking For

Bachelor s degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design and 15+ years experience Or MSc EE 10-12+ Or PhD EE with 10+ years of experience in the areas of design of high-performance RFAnalog Receiver/TIA design.

  • Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry).
  • Solid experience in.
  • Using EDA CAD tools
  • Performing Analog Custom Layout
  • Experience in measuring IC performance and debug of design to correlate simulations to measurements
  • Deep understanding of fundamentals, including:
  • Detailed transistor level design
  • Device physics
  • Control/Feedback loop stability analysis
  • Direct project experience in at least one of the following areas is a plus:
  • Aloop design
  • High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)
  • Experience in CTLE design
  • Experience in Package-System integration issues desired
  • Project experience in using different technologies. (SiGe BiCMOS is a plus)
  • A team-player
  • Experience in the following is needed:
  • Proven leadership and experience in working with multidisciplinary teams & projects
  • Experience as chip lead with success in silicon
  • Experience in taking chips to mass production
  • Ability to translate chip level specifications into architecture
  • Experience in the following is a strong plus:
  • Overseeing and mentoring junior circuit designers
  • Willingness to share knowledge with other team members.
  • Strong communication, presentation and documentation skills.

What are the 3-4 non-negotiable requirements of this position?

Bachelor s degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design and 15+ years experience Or MSc EE 10-12+ Or PhD EE with 10+ years of experience in the areas of design of high-performance RFAnalog Receiver/TIA design. Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry). Solid experience in. Using EDA CAD tools Performing Analog Custom Layout Experience in measuring IC performance and debug of design to correlate simulations to measurements Deep understanding of fundamentals, including: Detailed transistor level design Device physics Control/Feedback loop stability analysis Direct project experience in at least one of the following areas is a plus: Aloop design High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC) Experience in CTLE design

What are the nice-to-have skills?

ALL

Describe how this position fits in your organization.

Group designs physical layer ICs for high-speed fiber optic data communication, such as Transimpedance Amplifiers (TIAs), and drivers for Silicon Photonic (SiPho) and discrete Electro-absorption Modulators (EAMs) and Mach-Zehnder Interferometer Modulators (MZMs). This group is the market leader in delivering TIAs and Drivers for Data Center and Telecom markets. We address the bandwidth, capacity and power issues faced by cloud computing and mega data center networks. Our world class group leverages our core competencies in advanced circuit design to solve the world s ever-increasing desire to transmit more data for less power with fewer errors. We are continually first to market in Data Center, Metro and Long-Haul applications. As a member of the design group, the candidate will be responsible for design and validation of FET and BiCMOS circuits for high-speed broadband ICs that serve these application

What is exciting about this opportunity? Please include team and company culture.

semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, is a place to thrive, learn, and lead.

There is a possibility for sponsorship.

Yes

There is equity in this position.

Yes

Is relocation available?

Yes, nationwide

Is this a new position, or a backfill?

New Position

This position has direct reports.

No

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
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